Positron's $875M round lands under four months before Asimov's tapeout target
Positron says the money covers a TSMC N3P tapeout by the end of 2026, a new 2MW engineering data center and a production ramp in the second half of 2027. The larger of the round's two tranches is described as up to $500 million.
The Engineer · Build desk
What happened
- Positron AI said it raised $875 million at a $5 billion post-money valuation to move Asimov, its next-generation inference processor, from design into silicon.
- The round is two tranches: a $375 million Series C priced at $3.5 billion pre-money, and a Series C-1 of up to $500 million led by NEA and Jim Clark.
- Positron is targeting tapeout by the end of 2026 and production in the second half of 2027, and the company says Asimov has not yet reached silicon.
- Titan, the system built from four to eight Asimov chips, is being designed for models above 16 trillion parameters and context windows beyond 10 million tokens.
- Positron says more than 50 racks of Atlas, its first-generation inference system, had been deployed at Oracle Cloud Infrastructure by August 2026.
Why it matters
- Who has to decide decision A team shortlisting non-Nvidia inference silicon this year is deciding about Atlas. Asimov cannot be evaluated on measured parts until production opens in the second half of 2027.
- Who's exposed exposure The tranche capped at $500 million is the part of the round that has to arrive for the production ramp to be funded at the announced size. Buyers negotiating 2027 delivery are exposed to whether it fills.
- What it limits constraint Skipping HBM and CoWoS takes Positron out of two contested supply queues, and it makes capacity the specification the company publishes. Sizing decode throughput against an HBM part needs a bandwidth number.
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The tapeout target is close. Runtimewire dates the announcement to September 10th [2], seven months after Positron's February 2026 round [8]; from September 10 to the end of the year is 112 days [20]. The Economic Times reported that the proceeds will fund the final design stage of Asimov [6], which fits a schedule that tight. Positron says the round also covers the N3P tapeout itself and Titan's production ramp, plus a new engineering data center of more than 2 megawatts [3].
PitchBook put the February valuation at $1.06 billion [7], so the new mark is about 4.7 times that [27]. The first tranche, $375 million at $3.5 billion pre-money, puts the company at $3.875 billion post [5][21]. Reaching the stated $5 billion with a second tranche of $500 million implies a pre-money near $4.5 billion for the C-1 [22], a step-up of roughly $625 million between the two checks [29]. The Economic Times describes that tranche as up to $500 million, so the headline $875 million assumes it fills to its cap [5][25].
Qatar Investment Authority, Cisco Investments and Naver Ventures were among the additional investors [14]. The new directors are Forest Baskett of NEA, Gavin Baker of Atreides Management, Thomas Jermoluk of the Jim Clark Office and Dylan Patel, who founded SemiAnalysis [13].
Each Asimov chip is specified at between 288GB and 2,304GB of memory [16]. Eight chips at the top of that range is 18,432GB in one Titan node [23]. Divide that by 16 trillion parameters and you get about 1.15 bytes per parameter [24], and the key-value cache for a 10-million-token context has to come out of the same pool. The 16-trillion-parameter figure therefore describes the largest build, running weights at roughly a byte each.
Positron uses commodity LPDDR5X in place of high-bandwidth memory and advanced CoWoS packaging [17]. That keeps Positron clear of two of the tightest queues in the chain. Positron argues the approach delivers more usable memory capacity, lower power consumption and better inference economics without customers rebuilding data centers around unusually dense liquid-cooled racks [18]. For that to hold on a given serving workload, the workload has to be capacity-bound. Both write-ups leave out the per-chip bandwidth figure [28], and for a memory-bound decode step bandwidth is what sets tokens per second once the weights are resident.
Atlas is what a buyer can measure this year. Positron shipped its first Atlas customer server in August 2024, according to its own timeline [12], and names Cloudflare and Parasail as customers or evaluation partners [19]. Runtimewire writes that the $5 billion valuation rests on Asimov reaching silicon on schedule and proving its economics on real workloads [26].
What to watch
- Whether Positron confirms an Asimov tapeout on or before December 31, 2026, and on N3P as stated.
- Whether the Series C-1 closes at the full $500 million or below its cap.
- A published per-chip bandwidth figure for Asimov. Buyers cannot compare decode throughput against an HBM part without it.
Clarity's read
What the record supports and how the coverage leans. The claims behind it follow.
Reality
- Evidence55
- Adoption35
- Hype gap+32
- Incentives72
- Confidence62
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- [1]
Positron AI announced it raised $875 million at a $5 billion post-money valuation, giving co-founder Thomas Sohmers and CEO Mitesh Agrawal capital to move Asimov, its next-generation inference processor, from design into silicon.
- [2]
The financing was detailed in a September 10th announcement.
- [3]
The financing is meant to cover Asimov's tapeout on TSMC's N3P manufacturing process, a new engineering data center of more than 2 megawatts, and the production ramp for Titan, a system built around four to eight Asimov chips.
- [4]
Positron is targeting tapeout by the end of 2026 and production in the second half of 2027.
- [5]
The financing was split into two tranches: a $375 million Series C at a $3.5 billion pre-money valuation and a Series C-1 of up to $500 million led by NEA and Jim Clark.
- [6]
Proceeds will fund the final design stage of Asimov, the company's next-generation chip.
- [7]
The startup had raised $230 million in February at a valuation of $1.06 billion, according to data provider PitchBook.
- [8]
Positron announced a $230 million Series B in February 2026, and the new financing came seven months later.
- [9]
Titan will combine four to eight Asimov chips into a single node.
- [10]
Positron is designing Titan for models with more than 16 trillion parameters and context windows exceeding 10 million tokens.
- [11]
Positron says more than 50 Atlas racks had been deployed at Oracle Cloud Infrastructure by August 2026.
- [12]
Positron shipped the first Atlas customer server in August 2024, according to Positron's timeline.
- [13]
Forest Baskett of NEA, Gavin Baker of Atreides Management, Dylan Patel, the founder of SemiAnalysis, and Thomas Jermoluk from Jim Clark Office will join Positron's board.
- [14]
Qatar Investment Authority, Cisco Investments and Naver Ventures were among additional investors.
- [15]
Asimov has not reached silicon; its performance, manufacturing yield and economics will have to survive the transition from design targets to customer workloads.
- [16]
Positron says each Asimov chip will support between 288GB and 2,304GB of memory.
- [17]
Positron decided to use commodity LPDDR5X memory instead of relying on high-bandwidth memory and advanced CoWoS packaging, two heavily contested parts of the AI chip supply chain.
- [18]
Positron argues the LPDDR5X approach can deliver more usable memory capacity, lower power consumption and better inference economics without requiring customers to rebuild data centers around unusually dense liquid-cooled racks.
- [19]
The supplied company material names Cloudflare and Parasail as customers or evaluation partners, and Positron has not disclosed the commercial terms of these relationships.
- [20]
From the September 10, 2026 announcement to the end of 2026 is 112 days, under four months.
- [21]
The first tranche implies a post-money valuation of $3.875 billion.
- [22]
Reaching a $5 billion post-money valuation with a $500 million Series C-1 implies a pre-money valuation of about $4.5 billion for that tranche.
- [23]
Eight Asimov chips at 2,304GB each is 18,432GB of memory in one Titan node.
- [24]
18,432GB divided by 16 trillion parameters is about 1.15 bytes per parameter.
- [25]
The first tranche plus the Series C-1 at its stated cap equals the headline $875 million.
- [26]
The $5 billion valuation rests on Asimov reaching silicon on schedule and proving its economics on real workloads.
- [27]
The new $5 billion valuation is about 4.7 times the $1.06 billion February valuation.
- [28]
Neither runtimewire.com nor The Economic Times gives a memory bandwidth figure for Asimov; both describe memory in capacity terms only.
- [29]
The implied step-up between the two tranche prices is about $625 million.
Sources
2 independent publishers whose own reporting we read for this story.
- economictimes.indiatimes.comAI chip startup Positron's valuation skyrockets in latest funding round - The Economic Times
1 article · September 10, 2026
- runtimewire.comPositron raises $875M to get its next inference chip into silicon
1 article · September 13, 2026
Topics and entities
Topics
- Accelerator memory architecture
- AI inference chips
- AI hardware funding
- Semiconductor tapeout and ramp