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Product Independently confirmed2 publishers 3 min read Published

ASML lines up TSMC and Samsung behind a photomask change that pays off in 2033

The consortium's own timeline puts 12-inch masks into advanced-node production in 2033, two process generations out, which leaves Samsung's 2028 DRAM target as the one milestone close enough for a buyer to quote against.

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What happened

  • ASML said Samsung and TSMC will join Intel in adopting its High NA EUV lithography machines, with Samsung building DRAM on them by 2028 and TSMC using them in advanced nodes from 2030.
  • Both chipmakers also joined an ASML initiative to replace the six-inch photomask standard with 12-inch masks, with pilot fabs tested in 2031 and production expected in 2033.
  • SK Hynix is weighing whether to join the mask consortium and is targeting the same 2028 date as Samsung for High NA DRAM in volume, according to TNW.
  • Intel is still the only company running High NA in production, on its 18A process for selected Core Ultra Series 3 laptop chips, with ASML saying more than a million wafers have been built.
  • TSMC, which TNW reports had been the most conspicuous holdout on High NA, is now co-signing ASML's roadmap alongside its Korean rival.

Why it matters

  • What it limits constraint Stitching survives the 2030 milestone, because TSMC's first High NA years run on six-inch masks, so the seam that big AI dies depend on stays in the process until the larger masks reach production.
  • What it costs cost The capital for a mask change lands on blank, pellicle, writer and inspection suppliers ASML does not own, and none of them recover it unless High NA becomes the default tool rather than the exception.
  • Who has to decide decision Memory buyers are the only readers with something to act on, since Samsung's DRAM date does not sit behind the mask transition and can be pressed in a supplier review now.
  • What doesn't add up contradiction Engadget presents the machines as help for the chip shortage, while TNW reports the tools will not be ready for advanced-node production until 2033 and the AI chips they are meant to print do not exist yet.

Somebody is putting a memory price into a 2027 bill of materials this week, and a slide with 2033 on it does nothing for them. Here is what buyers actually do with a dated fab roadmap: they check whether the date lands before the thing they are quoting ships. Here is what suppliers tell themselves buyers do: they read the whole decade and feel covered.

The reason the masks matter at all is optical. High NA systems use anamorphic optics to resolve finer features, and the trade is that they expose roughly half the area of the older generation in one pass [8]. Processors designed by Nvidia and Google already run to about 800 square millimetres, which sits at the ceiling of what current tools print at once, so on a High NA machine a die that size has to be stitched from two exposures, costing throughput and introducing a seam where yield problems like to live [9]. TSMC's own description of the payoff is that bigger masks increase fab productivity, lower chipmaking costs and remove stitching constraints [24].

The dates do not arrive in that order. TSMC intends to run High NA in high-volume manufacturing at advanced nodes from 2030 on the existing 6-inch masks, and ASML chief executive Christophe Fouquet framed adoption as progressive, 6-inch first and 12-inch later [15]. Pilot masks come in 2031 and the systems are not expected ready for advanced-node production until 2033 [4]. That is at least three years of TSMC High NA output with the seam still in it for any die above the single-exposure limit [21], and two years between the pilot line and production readiness [18]. Samsung's DRAM target sits five years ahead of the mask date, so the memory plan is not waiting on masks at all [22].

The throughput number is conditional in its own wording. ASML chief technology officer Marco Pieters told Reuters that "if we're going to pull it off as an industry, then you'll actually see that the productivity of those systems will go up by 40 percent" [23]. Pulling it off means blank suppliers, pellicle makers, mask writers, inspection and repair tools, and every handling system in a fab, none of which ASML owns [11]. TNW describes the result as a decade of coordinated capital spending across companies that compete with each other, a reasonable bet that is still a bet [14]. Intel bought into the machines early, when they cost roughly $400mn each, and each High NA tool is worth several times a conventional EUV system to ASML [16]. Engadget's caution is worth keeping next to the calendar: ramping the technology is not easy, and both companies may hit bottlenecks that thwart their planned production dates [17].

Two questions sort a roadmap like this, and neither is about the timeline. First, whether a single company controls the date. Second, whether the date lands inside the horizon of the purchase in front of you. Samsung's 2028 DRAM clears both for anyone specifying memory for 2028 and later, which makes it the one line here worth raising with an account team. TSMC's 2030 is single-owner and outside most hardware horizons, so watch it rather than plan on it. The 2031 and 2033 mask dates are owned by no one in particular and sit past almost everybody's horizon, which puts them closer to a standards charter than to bookable capacity. The earliest milestone in the whole announcement is 2028, so for anything shipping before then, this contains no dates [20].

What to watch

  • Whether SK Hynix formally joins the 12-inch mask consortium, which would put both big DRAM makers on the same mask path.
  • Whether mask blank, pellicle and inspection suppliers publicly commit capital to 12-inch, given ASML owns none of that supply chain.
  • Whether Apple selects 18A-P for its next A-series processor, the first large outside customer validation of High NA output.

Clarity's read

What the record supports and how the coverage leans. The claims behind it follow.

Reality

Evidence56
Adoption28
Hype gap+34
Incentives78
Confidence62
Why these scores

Claim ledger

Ranked by verification strength, evidence, and original report placement.

  1. [1]

    ASML announced that Samsung and TSMC will join Intel in adopting its latest High NA extreme ultraviolet (EUV) lithography machines.

    Reported SupportedView cited source
  2. [2]

    Samsung plans to build DRAM memory products using High NA EUV by 2028, while TSMC said it will deploy the technology in advanced nodes starting in 2030.

    Reported SupportedView cited source
  3. [3]

    ASML created an initiative with TSMC and Samsung to transition to large-format 12-inch photomasks from the current standard of six inches.

    Reported SupportedView cited source
  4. [4]

    ASML will start testing 12-inch photomask fabs in 2031, with production expected to start in 2033; TNW reports the systems are not expected to be ready for advanced-node production until 2033.

    Reported SupportedView cited source
  5. [5]

    SK Hynix is evaluating its own participation in the 12-inch photomask consortium.

    Reported SupportedView cited source
  6. [6]

    TNW reports SK Hynix is weighing whether to join the consortium while aiming at 2028 for High NA DRAM in volume, the same year Samsung is targeting.

    Reported SupportedView cited source
  7. [7]

    High NA EUV has so far only been deployed by Intel, on its 18A process for select Core Ultra Series 3 (Panther Lake) processors, and ASML said Intel has built more than a million wafers using the new process.

    Reported SupportedView cited source
  8. [8]

    High NA systems use anamorphic optics to resolve finer features, and the trade is that they expose roughly half the area of the older generation in one pass.

    Reported SupportedView cited source
  9. [9]

    Processors designed by Nvidia and Google already run to about 800 square millimetres, at the ceiling of what current tools print at once; on a High NA machine a die that size would have to be stitched from two exposures, costing throughput and introducing a seam where yield problems like to live.

    Reported SupportedView cited source
  10. [10]

    TNW reports that 2033 is two full process generations away and that the AI chips the 12-inch mask transition is meant to enable do not exist yet.

    Reported SupportedView cited source
  11. [11]

    Changing mask size pulls in blank suppliers, pellicle makers, mask writers, inspection and repair tools, and every handling system in a fab, none of which ASML owns.

    Reported SupportedView cited source
  12. [12]

    TNW reports that TSMC, the world's largest contract chipmaker, has been the most conspicuous holdout on High NA and is now co-signing the roadmap.

    Reported SupportedView cited source
  13. [13]

    TSMC chairman and chief executive C.C. Wei said bringing together expertise from across the industry's value chain was intended to keep delivering cutting-edge technology "through continuous innovation that lowers barriers".

    Reported SupportedView cited source
  14. [14]

    TNW characterises the plan as a decade of coordinated capital spending across companies that compete with each other, agreed on the expectation that chips will keep getting bigger: a reasonable bet that is still a bet.

    Reported SupportedView cited source
  15. [15]

    TSMC intends to use High NA in high-volume manufacturing at advanced nodes from 2030 on the existing 6-inch masks, and ASML chief executive Christophe Fouquet framed adoption as progressive, starting on 6-inch masks and later supported by 12-inch ones.

    Reported SupportedView cited source
  16. [16]

    Intel bought into High NA early, when the tools cost roughly $400mn each, and every High NA system ASML sells is worth several times a conventional EUV tool.

    Reported SupportedView cited source
  17. [17]

    Engadget notes that ramping up to High NA is not easy and that both Samsung and TSMC may run into bottlenecks that thwart their planned production dates.

    Reported SupportedView cited source
  18. [18]

    Two years separate the 12-inch mask pilot line from expected production readiness.

    Derived Supported
  19. [19]

    ASML is already trying to build machines faster because AI demand is running ahead of what its factories can produce.

    Reported SupportedView cited source
  20. [20]

    The earliest dated milestone in the announcement is 2028, so nothing in it changes supply before that year.

    Derived Supported
  21. [21]

    TSMC's High NA advanced-node production would run for at least three years on 6-inch masks before 12-inch masks reach production, leaving stitching in place for dies above the single-exposure limit.

    Derived Supported
  22. [22]

    Samsung's 2028 High NA DRAM target falls five years before 12-inch mask production, so the DRAM plan does not depend on the mask transition.

    Derived Supported
  23. [23]

    ASML chief technology officer Marco Pieters told Reuters: "If we're going to pull it off as an industry, then you'll actually see that the productivity of those systems will go up by 40 percent."

    Reported InsufficientView cited source
  24. [24]

    TSMC said the larger masks will "increase fab productivity, lower chipmaking costs and remove stitching constraints".

    Reported InsufficientView cited source
  25. [25]

    ASML is working on an advanced version of the process called 18A-P, under consideration by Apple for its next-generation A-series iPhone processors.

    Reported InsufficientView cited source

Sources

2 independent publishers whose own reporting we read for this story.

  1. engadget.com

    2 articles · September 8, 2026

    Samsung and TSMC hope AMSL's new machines will help address the chip shortage
  2. thenextweb.com

    1 article · September 8, 2026

    TSMC backs ASML’s plan for bigger masks so its newest machines can print AI’s biggest chips

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