Product Reports disagree 2 publishers 2 min read Published Sep 15, 2026, 1:41 PM PDT

Euclyd raises $230M for a 2028 agent chip built around its memory architecture

The Dutch startup says craftwerk is designed to run AI agents, and the design details it has published so far are about ASICs and processor-memory co-design. Samsung, one of the biggest HBM suppliers, co-led the round.

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What happened

Euclyd BV, a chipmaker based at High Tech Campus Eindhoven, said it raised more than 200 million euros, about $230 million, in a Series A led by Samsung Electronics, Somerset Capital Partners and the Scaleup Europe Fund.
Peter Wennink, the former chief executive of ASML Holdings, joined Euclyd's board as part of the raise, and imec.xpand was among the other institutional backers.
The chip, called craftwerk, will ship inside a system called CWS that Euclyd expects to power AI clusters with more than an exaflop of performance.
Euclyd says craftwerk's computing module will be an ASIC with an "innovative memory architecture," and that it will pursue processor-memory co-design to attack the memory wall.
CNBC reported that Euclyd plans to launch the silicon in 2028 and hopes to gain thousands of enterprise customers by 2030.

Why it matters

What doesn't add up contradiction Euclyd's public claim is the workload label; the inference-not-training reading and the CPU cores come from SiliconANGLE. Anyone drawing up a shortlist of agent silicon would be setting a publisher's inference against other vendors' spec sheets.
Who's exposed exposure Samsung sells HBM and has now helped fund a company pursuing processor-memory co-design, part of a group of custom designs whose stated aim is to replace the standard HBM shipping with GPUs today.
Who has to decide decision Euclyd intends to license the underlying technologies to other chipmakers. A buyer tracking this would be evaluating a supplier's supplier, not a vendor it purchases from directly.
What's now possible capability If the co-design delivers on memory bandwidth, the benefit lands on any inference workload running on the part, so the agent label narrows only the marketing.

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Confirmed3 publishers

Euclyd's own description of the workload is one phrase: craftwerk is "designed to run AI agents" ^[7]. The rest of the compute story in SiliconANGLE's account is the publisher's own reading, and a fair one. The site wrote that the phrasing "suggests the chip will include circuits optimized for inference rather than training." It added that either craftwerk or the CWS system around it is likely to include CPU cores, because agents need cores to run their tools as well as accelerators for inference ^[23]^[24].

The design work Euclyd did describe is memory work, and nothing in it is agent-specific. SiliconANGLE sets it beside two other custom memory efforts. Nvidia's NVHBM, shown last month, moves circuits off the HBM base die into the stack above it and narrows the channels carrying data through the base die; Nvidia says that frees up 30% of a GPU's surface area for more computing circuits ^[9]^[10]. d-Matrix does some inference calculations inside SRAM and passes the rest to its own cores, and says its chips are more power-efficient than traditional GPUs ^[15]^[16]. Neither is described as an agent chip; both target the memory wall ^[8]^[14].

Samsung's own hardware points the same direction. It is one of the world's top HBM suppliers ^[17]. Last month it debuted a way to put HBM directly on top of a GPU's computing circuits, where designers currently place memory dies and logic side by side ^[18]. The money went to a company promising processor-memory co-design ^[13].

Euclyd frames the goal in power and cost terms, saying craftwerk is designed for a "future in which advanced AI is no longer constrained by infrastructure cost, power availability or geography" ^[11]. SiliconANGLE reported the round on September 15, 2026, which leaves roughly two years between the money and first silicon and about four to the enterprise customer target ^[1]^[21].

For the person picking infrastructure for agents now, what separates the pitch from the work is which part of the agent loop the silicon touches: the model's forward pass, or the tool calls and the orchestration between them. The other is whether that answer sits in a spec or in a reporter's inference. On craftwerk, the first answer is not public yet, and the second answer is a reporter's inference ^[23]^[24].

What to watch

Whether Euclyd publishes a spec naming general-purpose cores on craftwerk or inside the CWS system.
Whether Samsung's HBM-on-logic stacking technology turns up in CWS, or Euclyd's co-design goes to another memory supplier.
Whether any chipmaker is named as a licensee of the underlying technology before the 2028 launch date.

Clarity's read

What the record supports and how the coverage leans. The claims behind it follow.

Reality

Evidence55
Adoption: Not scored
Hype gap+45
Incentives78
Confidence62

Why these scores

Claim ledger

Ranked by verification strength, evidence, and original report placement.

[1]
SiliconANGLE published its report on the Euclyd raise on September 15, 2026, saying the company "today announced" it.
Reported SupportedView cited source
[2]
Dutch chipmaker Euclyd BV announced it raised more than 200 million euros, or $230 million.
Reported SupportedView cited source
[3]
Other institutional backers in the round included imec.xpand, a fund associated with the Imec nanotechnology research center.
Reported SupportedView cited source
[4]
Peter Wennink, the former Chief Executive Officer of ASML Holdings NV, joined Euclyd's board as part of the raise.
Reported SupportedView cited source
[5]
Euclyd is headquartered at High Tech Campus Eindhoven, a research hub a few miles from ASML's head office.
Reported SupportedView cited source
[6]
Euclyd is developing an AI chip called craftwerk and will ship it as part of a system called CWS that is expected to power AI clusters with more than an exaflop of performance.
Reported SupportedView cited source
[7]
Euclyd says that craftwerk is designed to run AI agents.
Reported SupportedView cited source
[8]
Euclyd hopes to tackle the memory wall, an engineering challenge relating to the rate at which data moves between a GPU's computing and HBM modules.
Reported SupportedView cited source
[9]
Nvidia last month debuted a custom memory architecture called NVHBM that moves certain circuits from the HBM base die to the stack above it and shrinks the hardware channels moving data through the base die.
Reported SupportedView cited source
[10]
Nvidia says the NVHBM changes can free up 30% of a GPU's surface area, letting engineers add more computing circuits.
Reported SupportedView cited source
[11]
Euclyd says craftwerk is designed for a "future in which advanced AI is no longer constrained by infrastructure cost, power availability or geography."
Reported SupportedView cited source
[12]
According to Euclyd, craftwerk's computing module will be an application-specific integrated circuit, and the chip will feature an "innovative memory architecture."
Reported SupportedView cited source
[13]
Euclyd said it plans to pursue "processor-memory co-design," indicating its RAM architecture will be optimized to work with its ASIC.
Reported SupportedView cited source
[14]
Multiple custom memory designs have appeared in the AI ecosystem in recent years, aiming to replace the standard HBM memory that ships with today's GPUs.
Reported SupportedView cited source
[15]
d-Matrix Inc. has developed a custom memory architecture that uses SRAM to carry out some inference calculations, sending computations that cannot be performed in-memory to its own processing cores.
Reported SupportedView cited source
[16]
d-Matrix says its chips are more power-efficient than traditional GPUs.
Reported SupportedView cited source
[17]
Samsung is one of the world's top HBM suppliers.
Reported SupportedView cited source
[18]
Samsung last month debuted a technology that makes it possible to place HBM memory directly atop a GPU's computing circuits; today chip designers implement memory dies and computing modules side-by-side.
Reported SupportedView cited source
[19]
According to CNBC, Euclyd plans to launch its silicon in 2028.
Reported SupportedView cited source
[20]
Euclyd intends to sell the hardware to data center operators and license the underlying technologies to fellow chipmakers.
Reported SupportedView cited source
[21]
The September 15, 2026 report leaves roughly two years to the planned 2028 launch and about four years to the 2030 enterprise customer target.
Derived Supported
[22]
Samsung Electronics Co., Somerset Capital Partners and the Scaleup Europe Fund led the Series A deal.
Reported ContestedView cited source
[23]
SiliconANGLE wrote that Euclyd's statement "suggests the chip will include circuits optimized for inference rather than training."
Reported InsufficientView cited source
[24]
SiliconANGLE wrote that it is "likely that either craftwerk or CWS will include central processing unit cores" because AI agents require not only inference accelerators but also CPUs that can run their tools.
Reported InsufficientView cited source
[25]
Euclyd reportedly hopes to gain thousands of enterprise customers by 2030.
Reported InsufficientView cited source

Sources

2 independent publishers whose own reporting we read for this story.

datacenterdynamics.com
2 articles · September 15, 2026
Dutch AI chip startup Euclyd raises $231 million in funding round co-led by Samsung
siliconangle.com
2 articles · September 15, 2026
Euclyd raises $230M+ to develop chips for AI agents

Clarity analysis

How the coverage leans and what the record actually supports. Read the methodology

Perspective Coverage

How much of the coverage speaks to builders, operators and investors. It measures emphasis, not whether the story is right.

Builder

SiliconANGLE is the only account here that explains what changing a memory architecture involves: DRAM dies stacked on a base die, the base die as the interface to the processor, and where Nvidia's NVHBM and d-Matrix's SRAM approach move that boundary. On craftwerk itself the buildable detail is three sentences from Euclyd: the compute module is an ASIC, the memory architecture is "innovative," and the two are co-designed. SiliconANGLE fills in what a chip for agents would need, inference circuits plus CPU cores to run the tools, and flags that as its own inference. Neither report gives a bandwidth figure, a capacity, a process node, or a word about software.

Operator

Euclyd wants to sell systems to data center operators and license the technology to other chipmakers, and the pitch is cost per token and power draw. Datacenter Dynamics passes on the company's claim that CWS 32 is the lowest-power exascale AI factory in the world; SiliconANGLE has the exaflop-class cluster figure and the 2028 launch date. There is no rack power number, no price, and no named site in either account, so nothing here is procurable this planning cycle.

Investor

The round is $230m or $231m depending on who did the euro conversion, and its composition says more than its size. Samsung co-led, which puts one of the largest HBM makers behind a startup whose thesis is redesigning the processor-memory boundary. Datacenter Dynamics counts Innovation Industries as a fourth co-lead where SiliconANGLE names three, and adds EIFO, the Brabant Development Agency and Quadri to the participant list, so public and regional capital is in the cap table alongside the strategic. Peter Wennink chairs the board. Revenue depends on silicon that arrives in 2028, and the ambition of thousands of enterprise customers by 2030 is secondhand, credited to CNBC.