Topic
Next-generation packaging architectures for AI accelerators and the equipment and materials spend they generate.
Intel's recent roadmaps take EMIB's bump pitch from 45 microns to about 36 and then 25, Tom's Hardware reports. Virtually all its high-end client and data center CPUs already rely on EMIB and Foveros, but 12-reticle packages remain a goal.
Reality
GlobalFoundries signed a five-year deal with TSMC to make silicon interposers, targeting a volume ramp in the first half of 2028. Neither company disclosed pricing, customers or capacity, so the deal cannot yet show how much AI packaging work, if any, is leaving TSMC's own plants.
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AMD's Lisa Su said AI chip supply will rise substantially in 2027 and that supplier planning now runs three to five years out, up from one to two. She lifted the $10 billion Taiwan pledge without naming a new figure, so the case for a multi-year shortage still rests more on her forecast than on AMD's cash.
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Vanguard is fast-tracking a second Singapore fab while phase 1 of its first, rated at 44,000 wafers a month, is already fully allocated. Its chairman expects a long specialty-node crunch, but the expansion's decision date and financing are both still open.
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The toolmaker will spend more than $3 billion over five years to push experiment capacity past 1.5 million runs a year. Its named customers are the three largest memory makers.
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Counterpoint puts TSMC at 73% of second-quarter foundry revenue and Samsung Foundry at 5.9%. Because that share is weighted by leading-edge prices, it measures the scarcity of advanced capacity as much as the volume of it.
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Lip-Bu Tan told a Splunk keynote in Denver that relying on one Taiwan-based company for 95% of AI chip production is very risky. The one 14A commitment he can point to, Terafab, ships its first product in mid-2028.
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The Indiana plant broke ground in August with a clean room due by October 2028 and next-generation HBM in mass production the following year, which leaves anyone specifying memory for a 2027 product buying from today's lines.
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Vieworks wants 110 billion won of revenue by 2030 out of a camera line that added 1.1 billion won last year. The orders that would get it there are placed by chip toolmakers, one step removed from the fabs.
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Logic vendors have made copper-to-copper bonding routine. Memory has not, because HBM has to place pre-tested dies one at a time. A relaxed stack-height rule let HBM4 skip the switch entirely.
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The samples are real and so is the physics, but SKC's Absolics panels are still being reliability-tested in Taiwan, and Intel, which promised glass in 2023, now points its own deployment at around 2030.
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NVHBM offers NVLink Fusion partners 30 percent more bandwidth and 15 percent less power, in exchange for NVIDIA owning the interface between their compute and their memory.
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Micron's HBM design fellow says the memory's roughly threefold wafer-area penalty against DDR5 grows with every generation. The pricing that follows does not mean-revert on its own.
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Copper-to-copper slips to HBM5 at the earliest, so HBM4E capacity has to come out of die thickness inside a 775-micron package. iHBM heat blocks cannot be retrofitted to parts already in design.
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Taiwan and South Korea are splitting the AI server chain because demand exceeds what either can build. For 2026 supply forecasts, the binding step is the handoff, not any single fab.
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Revenue up 28%, EPS up 86%, operating margin up 480 basis points, and the only number that moved the stock was a 60 basis point gross margin guide-down.
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