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Open Compute Project

Open Compute Project is a nonprofit community that develops and shares open hardware designs and infrastructure standards for data centers.

Known aliases

  • OCP
  • OCP Global Summit

Current stories

securityOne report1 publisher

Ultra Ethernet Consortium releases UEC 1.1 with a scale-up profile and in-network collectives

Ultra Ethernet Consortium released UEC 1.1 on October 12, adding scale-up support, in-network collectives and programmable congestion control. It gives teams planning AI fabrics a published feature list to check vendors against.

Publishers:networkworld.com

Reality

Evidence50
Adoption
Not scored
Hype gap−5
Incentives
Not scored
Confidence60
buildOne report1 publisher

Cisco's USFP optic starts at 6.4 Tbps and reaches 12.8 Tbps at 32 lanes

Cisco, working with Nvidia, announced USFP, an OSFP-sized pluggable that targets 12.8 Tbps from 32 lanes of 400G. The first spec is 16 lanes at 6.4 Tbps, a 4x gain over 1.6 Tbps optics. Only the 32-lane version reaches 8x.

Publishers:assets.theregister.com

Reality

Evidence40
Adoption
Not scored
Hype gap+20
Incentives
Not scored
Confidence50
productConfirmed4 publishers

Nvidia hands the Open Compute Project its Vera Rubin rack and compute tray designs

Nvidia contributed its Vera Rubin rack and compute tray designs to the Open Compute Project at the project's Global Summit in San Jose. Nvidia says builders get common blueprints for racks, networking, power and cooling; the benchmark figures released alongside are its own.

Perspective Coverage

4 publishers
Builder
Builder 35%
Operator
Operator 36%
Investor
Investor 29%

Reality

Evidence52
Adoption30
Hype gap+25
Incentives70
Confidence62
productOne report1 publisher

Cisco says its new 51.2-terabit G302 switch chip will ship before the end of the year

Cisco told the Open Compute Project summit that its 102.4-terabit Silicon One G300 is now shipping to customers at volume. Buyers can order against those dates. The optics module Cisco showed with Nvidia rests on Cisco's own bandwidth claims.

Publishers:siliconangle.com

Reality

Evidence35
Adoption30
Hype gap+25
Incentives70
Confidence55
investConfirmed3 publishers

Samsung and AMD demonstrate AI servers borrowing memory from a shared CXL pool

Samsung and AMD demonstrated CXL memory pooling at the 2026 OCP Global Summit, letting AI servers borrow idle capacity from a shared pool. Pooling would move memory sizing from each server to the pool, so orders would follow combined cluster load.

Perspective Coverage

3 publishers
Builder
Builder 40%
Operator
Operator 32%
Investor
Investor 28%

Reality

Evidence35
Adoption
Not scored
Hype gap+20
Incentives70
Confidence65
buildOne report1 publisher

Arista's Etherlink SU-144 reference designs stretch an Ethernet scale-up domain to 1,024 accelerators

Arista paired its 7060EX7 switches with three Ethernet rack designs, the largest reaching 1,024 accelerators in one scale-up domain across racks. Teams on non-Nvidia chips such as Microsoft's Maia, the market Arista expects to grow, get a second scale-up fabric to evaluate.

Publishers:dev.to

Reality

Evidence35
Adoption
Not scored
Hype gap+30
Incentives70
Confidence40
buildOne report1 publisher

Atomic Machines tests its tooling-free factory claim on a 150-amp relay

Atomic Machines is shipping PrimeSwitch PS-150, a 150-amp relay and the first device built by its Matter Compiler, to early-access customers for evaluation. Those units are the first outside check on its claim that software can replace device-specific tooling.

Publishers:runtimewire.com

Reality

Evidence30
Adoption8
Hype gap+50
Incentives65
Confidence40
productOne report1 publisher

Arista's Etherlink SU-144 brings Ethernet scale-up to 144-accelerator domains outside Nvidia's NVLink

Arista's Etherlink SU-144 links up to 144 accelerators in one Ethernet hop and 1,024 across racks, built on the ESUN initiative. Arista says Nvidia-based racks stay on proprietary NVLink for now, so the open choice belongs to buyers of other accelerators.

Publishers:siliconangle.com

Reality

Evidence40
Adoption8
Hype gap+20
Incentives65
Confidence45
productOne report1 publisher

Arm now sells a chip, and its licensees are buying cores from a competitor

The AGI CPU is a 136-core Neoverse part co-designed with Meta. Arm's pitch to custom-silicon customers used to be that it had nothing of its own to sell.

Reality

Evidence40
Adoption22
Hype gap+32
Incentives72
Confidence45
buildOne report1 publisher

Meta hands its RDMA transport to OCP and dares the fabric vendors to follow

MetaRoCE ships as a spec, a reference implementation and a compliance suite. That last item is the part vendors will feel, because it decides who gets to claim conformance.

Reality

Evidence52
Adoption20
Hype gap+30
Incentives82
Confidence45